Bulg. J. Phys. vol.36 no.s1 (2009), pp. 01-18

Search for Future High-k Dielectrics, Boundary Conditions and Examples

A.J. Bauer1, M. Lemberger1, T. Erlbacher2, W. Weinreich3
1Fraunhofer Institute of Integrated Systems and Device Technology (IISB), Schottky strasse 10, 91058 Erlangen, Germany
2Chair of Electron Devices, University of Erlangen-Nuremberg, Cauerstrasse 6, 91058 Erlangen, Germany
3Fraunhofer Center Nanoelectronic Technology (CNT), Koenigsbruecker Strasse 180, 01099 Dresden, Germany
Abstract. The paper reviews recent progress and current challenges in implementing high-k dielectrics in microelectronics. Logic devices, non-volatile-memories, DRAMs and low power mixed-signal components are found to be the technologies where high-k dielectrics are implemented or will be introduced soon. Two gate architectures have to be considered: MOS with metal as gate electrode and MIM. In particular, Hf-silicates for logic and NVM devices in conventional MOS architecture and ZrO2 for DRAM cells in MIM architecture are discussed.

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